Configurable decoders with application in fast partial reconfiguration of FPGAs.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpga/JordanV08
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/fpga/JordanV08
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Matthew_Collin_Jordan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ramachandran_Vaidyanathan
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F1344671.1344715
>
foaf:
homepage
<
https://doi.org/10.1145/1344671.1344715
>
dc:
identifier
DBLP conf/fpga/JordanV08
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F1344671.1344715
(xsd:string)
dcterms:
issued
2008
(xsd:gYear)
rdfs:
label
Configurable decoders with application in fast partial reconfiguration of FPGAs.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Matthew_Collin_Jordan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ramachandran_Vaidyanathan
>
swrc:
pages
259
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2008
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/fpga/JordanV08/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/fpga/JordanV08
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/fpga/fpga2008.html#JordanV08
>
rdfs:
seeAlso
<
https://doi.org/10.1145/1344671.1344715
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/fpga
>
dc:
subject
FPGA, configurable logic, decoder, look-up table
(xsd:string)
dc:
title
Configurable decoders with application in fast partial reconfiguration of FPGAs.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document