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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/KashaniEKPRL24>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/James_R._Larus>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Keisuke_Kamahori>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mahyar_Emami>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mohammad_Sepehr_Pourghannad>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ritik_Raj>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sahand_Kashani>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3626202.3637579>
foaf:homepage <https://doi.org/10.1145/3626202.3637579>
dc:identifier DBLP conf/fpga/KashaniEKPRL24 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3626202.3637579 (xsd:string)
dcterms:issued 2024 (xsd:gYear)
rdfs:label A 475 MHz Manycore FPGA Accelerator for RTL Simulation. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/James_R._Larus>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Keisuke_Kamahori>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mahyar_Emami>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mohammad_Sepehr_Pourghannad>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ritik_Raj>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sahand_Kashani>
swrc:pages 78-84 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2024>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/KashaniEKPRL24/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/KashaniEKPRL24>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2024.html#KashaniEKPRL24>
rdfs:seeAlso <https://doi.org/10.1145/3626202.3637579>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:title A 475 MHz Manycore FPGA Accelerator for RTL Simulation. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document