Dual-Vt FPGA design for leakage power reduction (abstract only).
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpga/KumarA05
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/fpga/KumarA05
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Akhilesh_Kumar
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Mohab_Anis
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F1046192.1046249
>
foaf:
homepage
<
https://doi.org/10.1145/1046192.1046249
>
dc:
identifier
DBLP conf/fpga/KumarA05
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F1046192.1046249
(xsd:string)
dcterms:
issued
2005
(xsd:gYear)
rdfs:
label
Dual-Vt FPGA design for leakage power reduction (abstract only).
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Akhilesh_Kumar
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Mohab_Anis
>
swrc:
pages
272
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2005
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/fpga/KumarA05/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/fpga/KumarA05
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/fpga/fpga2005.html#KumarA05
>
rdfs:
seeAlso
<
https://doi.org/10.1145/1046192.1046249
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/fpga
>
dc:
title
Dual-Vt FPGA design for leakage power reduction (abstract only).
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document