FPGA clock network architecture: flexibility vs. area and power. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/fpga/LamoureuxW06>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Julien_Lamoureux>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Steven_J._E._Wilton>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1145%2F1117201.1117216>
foaf:homepage	<https://doi.org/10.1145/1117201.1117216>
dc:identifier	DBLP conf/fpga/LamoureuxW06 (xsd:string)
dc:identifier	DOI doi.org%2F10.1145%2F1117201.1117216 (xsd:string)
dcterms:issued	2006 (xsd:gYear)
rdfs:label	FPGA clock network architecture: flexibility vs. area and power. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Julien_Lamoureux>
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Steven_J._E._Wilton>
swrc:pages	101-108 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2006>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/fpga/LamoureuxW06/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/fpga/LamoureuxW06>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/fpga/fpga2006.html#LamoureuxW06>
rdfs:seeAlso	<https://doi.org/10.1145/1117201.1117216>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject	FPGA, architecture, clock network, low-power (xsd:string)
dc:title	FPGA clock network architecture: flexibility vs. area and power. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:InProceedings
rdf:type	foaf:Document