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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/LinLH05>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fei_Li_0003>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lei_He_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yan_Lin_0001>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1046192.1046218>
foaf:homepage <https://doi.org/10.1145/1046192.1046218>
dc:identifier DBLP conf/fpga/LinLH05 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1046192.1046218 (xsd:string)
dcterms:issued 2005 (xsd:gYear)
rdfs:label Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fei_Li_0003>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lei_He_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yan_Lin_0001>
swrc:pages 199-207 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2005>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/LinLH05/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/LinLH05>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2005.html#LinLH05>
rdfs:seeAlso <https://doi.org/10.1145/1046192.1046218>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject FPGA architecture, FPGA power model, Vdd programmability, dual-Vdd, low power (xsd:string)
dc:title Power modeling and architecture evaluation for FPGA with novel circuits for Vdd programmability. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document