Power-aware FPGA technology mapping for programmable-VT architectures (abstract only).
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpga/LokeH12
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Power-aware FPGA technology mapping for programmable-VT architectures (abstract only).
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Power-aware FPGA technology mapping for programmable-VT architectures (abstract only).
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