A high performance 32-bit ALU for programmable logic. | D2R Server publishing the DBLP Bibliography Database, hosted at L3S Research Center

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dcterms:bibliographicCitation	<http://dblp.uni-trier.de/rec/bibtex/conf/fpga/Metzgen04>
dc:creator	<https://dblp.l3s.de/d2r/resource/authors/Paul_Metzgen>
foaf:homepage	<http://dx.doi.org/doi.org%2F10.1145%2F968280.968291>
foaf:homepage	<https://doi.org/10.1145/968280.968291>
dc:identifier	DBLP conf/fpga/Metzgen04 (xsd:string)
dc:identifier	DOI doi.org%2F10.1145%2F968280.968291 (xsd:string)
dcterms:issued	2004 (xsd:gYear)
rdfs:label	A high performance 32-bit ALU for programmable logic. (xsd:string)
foaf:maker	<https://dblp.l3s.de/d2r/resource/authors/Paul_Metzgen>
swrc:pages	61-70 (xsd:string)
dcterms:partOf	<https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2004>
owl:sameAs	<http://bibsonomy.org/uri/bibtexkey/conf/fpga/Metzgen04/dblp>
owl:sameAs	<http://dblp.rkbexplorer.com/id/conf/fpga/Metzgen04>
rdfs:seeAlso	<http://dblp.uni-trier.de/db/conf/fpga/fpga2004.html#Metzgen04>
rdfs:seeAlso	<https://doi.org/10.1145/968280.968291>
swrc:series	<https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject	ALU, Apex 20KE, FPGA, Nios, programmable logic, soft processors (xsd:string)
dc:title	A high performance 32-bit ALU for programmable logic. (xsd:string)
dc:type	<http://purl.org/dc/dcmitype/Text>
rdf:type	swrc:InProceedings
rdf:type	foaf:Document