Technology Mapping of Sequential Circuits for LUT-Based FPGAs for Performance.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpga/PanL96
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1996
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Technology Mapping of Sequential Circuits for LUT-Based FPGAs for Performance.
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FPGAs, clock period, logic replication, look-up table, retiming, sequential circuits, technology mapping
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Technology Mapping of Sequential Circuits for LUT-Based FPGAs for Performance.
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