DRAM-based FPGA enabled by three-dimensional (3d) memory stacking (abstract only).
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpga/PanZ10
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DRAM-based FPGA enabled by three-dimensional (3d) memory stacking (abstract only).
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3d integration, dram-based fpga, memory stacking
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DRAM-based FPGA enabled by three-dimensional (3d) memory stacking (abstract only).
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