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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/SwaminathanTGB02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Dennis_Goeckel>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Russell_Tessier>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sriram_Swaminathan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wayne_P._Burleson>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F503048.503081>
foaf:homepage <https://doi.org/10.1145/503048.503081>
dc:identifier DBLP conf/fpga/SwaminathanTGB02 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F503048.503081 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label A dynamically reconfigurable adaptive viterbi decoder. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Dennis_Goeckel>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Russell_Tessier>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sriram_Swaminathan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wayne_P._Burleson>
swrc:pages 227-236 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/SwaminathanTGB02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/SwaminathanTGB02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2002.html#SwaminathanTGB02>
rdfs:seeAlso <https://doi.org/10.1145/503048.503081>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject data reorganization, field-programmable-gate-arrays (FPGAs), high-level synthesis (xsd:string)
dc:title A dynamically reconfigurable adaptive viterbi decoder. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document