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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/VisserHC16>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Edoardo_Charbon>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Harald_Homulle>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Stefan_Visser>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F2847263.2847310>
foaf:homepage <https://doi.org/10.1145/2847263.2847310>
dc:identifier DBLP conf/fpga/VisserHC16 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F2847263.2847310 (xsd:string)
dcterms:issued 2016 (xsd:gYear)
rdfs:label A 1 GSa/s, Reconfigurable Soft-core FPGA ADC (Abstract Only). (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Edoardo_Charbon>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Harald_Homulle>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Stefan_Visser>
swrc:pages 281 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2016>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/VisserHC16/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/VisserHC16>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2016.html#VisserHC16>
rdfs:seeAlso <https://doi.org/10.1145/2847263.2847310>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:title A 1 GSa/s, Reconfigurable Soft-core FPGA ADC (Abstract Only). (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document