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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/WuWCWH20>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chen_Wu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kun_Wang_0005>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lei_He_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mingyu_Wang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xinyuan_Chu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3373087.3375361>
foaf:homepage <https://doi.org/10.1145/3373087.3375361>
dc:identifier DBLP conf/fpga/WuWCWH20 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3373087.3375361 (xsd:string)
dcterms:issued 2020 (xsd:gYear)
rdfs:label Low Precision Floating Point Arithmetic for High Performance FPGA-based CNN Acceleration. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chen_Wu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kun_Wang_0005>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lei_He_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mingyu_Wang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xinyuan_Chu>
swrc:pages 318 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2020>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/WuWCWH20/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/WuWCWH20>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2020.html#WuWCWH20>
rdfs:seeAlso <https://doi.org/10.1145/3373087.3375361>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:title Low Precision Floating Point Arithmetic for High Performance FPGA-based CNN Acceleration. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document