[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpga/YiannacourasSR06>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J._Gregory_Steffan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jonathan_Rose>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Peter_Yiannacouras>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1117201.1117231>
foaf:homepage <https://doi.org/10.1145/1117201.1117231>
dc:identifier DBLP conf/fpga/YiannacourasSR06 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1117201.1117231 (xsd:string)
dcterms:issued 2006 (xsd:gYear)
rdfs:label Application-specific customization of soft processor microarchitecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J._Gregory_Steffan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jonathan_Rose>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Peter_Yiannacouras>
swrc:pages 201-210 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpga/2006>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpga/YiannacourasSR06/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpga/YiannacourasSR06>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpga/fpga2006.html#YiannacourasSR06>
rdfs:seeAlso <https://doi.org/10.1145/1117201.1117231>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpga>
dc:subject ASIP, FPGA, Nios, RTL generation, SPREE, application specific, customization, embedded processor, microarchitecture, soft processor (xsd:string)
dc:title Application-specific customization of soft processor microarchitecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document