An improved transmission scheme for error-prone inter-chip network-on-chip communication links implemented on FPGAs.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpgaworld/UddinO13
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An improved transmission scheme for error-prone inter-chip network-on-chip communication links implemented on FPGAs.
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An improved transmission scheme for error-prone inter-chip network-on-chip communication links implemented on FPGAs.
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