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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/BerubeZAM03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ashley_Zinyk>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_Nelson_Amaral>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mike_H._MacGregor>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Paul_Berube>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-45234-8%5F63>
foaf:homepage <https://doi.org/10.1007/978-3-540-45234-8_63>
dc:identifier DBLP conf/fpl/BerubeZAM03 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-45234-8%5F63 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
rdfs:label The Bank Nth Chance Replacement Policy for FPGA-Based CAMs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ashley_Zinyk>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_Nelson_Amaral>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mike_H._MacGregor>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Paul_Berube>
swrc:pages 648-660 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2003>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpl/BerubeZAM03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpl/BerubeZAM03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2003.html#BerubeZAM03>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-45234-8_63>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:subject field programmable gate array, cache memories, replacement policy, multizone cache, content addressable memories, Internet routing, digital design, memory systems (xsd:string)
dc:title The Bank Nth Chance Replacement Policy for FPGA-Based CAMs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document