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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/ChoiP03>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Seonil_Choi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Viktor_K._Prasanna>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-45234-8%5F50>
foaf:homepage <https://doi.org/10.1007/978-3-540-45234-8_50>
dc:identifier DBLP conf/fpl/ChoiP03 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-45234-8%5F50 (xsd:string)
dcterms:issued 2003 (xsd:gYear)
rdfs:label Time and Energy Efficient Matrix Factorization Using FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Seonil_Choi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Viktor_K._Prasanna>
swrc:pages 507-519 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2003>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpl/ChoiP03/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpl/ChoiP03>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2003.html#ChoiP03>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-45234-8_50>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:title Time and Energy Efficient Matrix Factorization Using FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document