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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/FuJQYH10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jun_Jiang>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ting_Yi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Wen-Hui_Fu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xi_Qin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhiliang_Hong>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FFPL.2010.50>
foaf:homepage <https://doi.org/10.1109/FPL.2010.50>
dc:identifier DBLP conf/fpl/FuJQYH10 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FFPL.2010.50 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label A Reconfigurable Analog Processor Based on FPAA with Coarse-Grained, Heterogeneous Configurable Analog Blocks. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jun_Jiang>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ting_Yi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Wen-Hui_Fu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xi_Qin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhiliang_Hong>
swrc:pages 211-216 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2010>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpl/FuJQYH10/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpl/FuJQYH10>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2010.html#FuJQYH10>
rdfs:seeAlso <https://doi.org/10.1109/FPL.2010.50>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:title A Reconfigurable Analog Processor Based on FPAA with Coarse-Grained, Heterogeneous Configurable Analog Blocks. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document