Design and Implementation of an XC6216 FPGA Model in Verilog.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpl/GlasmacherW00
Home
|
Example Publications
Property
Value
dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/fpl/GlasmacherW00
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Alexander_Glasmacher
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Kai_Woska
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1007%2F3-540-44614-1%5F48
>
foaf:
homepage
<
https://doi.org/10.1007/3-540-44614-1_48
>
dc:
identifier
DBLP conf/fpl/GlasmacherW00
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1007%2F3-540-44614-1%5F48
(xsd:string)
dcterms:
issued
2000
(xsd:gYear)
rdfs:
label
Design and Implementation of an XC6216 FPGA Model in Verilog.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Alexander_Glasmacher
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Kai_Woska
>
swrc:
pages
449-455
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2000
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/fpl/GlasmacherW00/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/fpl/GlasmacherW00
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/fpl/fpl2000.html#GlasmacherW00
>
rdfs:
seeAlso
<
https://doi.org/10.1007/3-540-44614-1_48
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/fpl
>
dc:
title
Design and Implementation of an XC6216 FPGA Model in Verilog.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document