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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/HuttonSLPYKBRPBLKS04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andy_Lee>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Boris_Ratchev>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bruce_Pedersen>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/David_M._Lewis>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Gregg_Baeckler>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Henry_Kim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jay_Schleicher>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ketan_Padalia>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mark_Bourgeault>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Michael_D._Hutton>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rahul_Saini>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Richard_Yuan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sinan_Kaptanoglu>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-30117-2%5F16>
foaf:homepage <https://doi.org/10.1007/978-3-540-30117-2_16>
dc:identifier DBLP conf/fpl/HuttonSLPYKBRPBLKS04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-30117-2%5F16 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Improving FPGA Performance and Area Using an Adaptive Logic Module. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andy_Lee>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Boris_Ratchev>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bruce_Pedersen>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/David_M._Lewis>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Gregg_Baeckler>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Henry_Kim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jay_Schleicher>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ketan_Padalia>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mark_Bourgeault>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Michael_D._Hutton>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rahul_Saini>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Richard_Yuan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sinan_Kaptanoglu>
swrc:pages 135-144 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpl/HuttonSLPYKBRPBLKS04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpl/HuttonSLPYKBRPBLKS04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2004.html#HuttonSLPYKBRPBLKS04>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-30117-2_16>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:title Improving FPGA Performance and Area Using an Adaptive Logic Module. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document