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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/JiaRV04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jayanthi_Rajagopalan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ranga_Vemuri>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Xin_Jia>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-30117-2%5F85>
foaf:homepage <https://doi.org/10.1007/978-3-540-30117-2_85>
dc:identifier DBLP conf/fpl/JiaRV04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-30117-2%5F85 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label A Dynamically Reconfigurable Asynchronous FPGA Architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jayanthi_Rajagopalan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ranga_Vemuri>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Xin_Jia>
swrc:pages 836-841 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpl/JiaRV04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpl/JiaRV04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2004.html#JiaRV04>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-30117-2_85>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:title A Dynamically Reconfigurable Asynchronous FPGA Architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document