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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/KogaIAISIS10>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jun_Iida>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masahiro_Iida>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Masahiro_Koga>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mitsuro_Saji>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Motoki_Amagasaki>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Toshinori_Sueyoshi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yoshinobu_Ichida>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FFPL.2010.67>
foaf:homepage <https://doi.org/10.1109/FPL.2010.67>
dc:identifier DBLP conf/fpl/KogaIAISIS10 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FFPL.2010.67 (xsd:string)
dcterms:issued 2010 (xsd:gYear)
rdfs:label First Prototype of a Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jun_Iida>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masahiro_Iida>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Masahiro_Koga>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mitsuro_Saji>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Motoki_Amagasaki>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Toshinori_Sueyoshi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yoshinobu_Ichida>
swrc:pages 298-303 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2010>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2010.html#KogaIAISIS10>
rdfs:seeAlso <https://doi.org/10.1109/FPL.2010.67>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:title First Prototype of a Genuine Power-Gatable Reconfigurable Logic Chip with FeRAM Cells. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document