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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/Krasniewski02a>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrzej_Krasniewski>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F3-540-46117-5%5F64>
foaf:homepage <https://doi.org/10.1007/3-540-46117-5_64>
dc:identifier DBLP conf/fpl/Krasniewski02a (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F3-540-46117-5%5F64 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label Exploiting Reconfigurability for Effective Testing of Delay Faults in Sequential Subcircuits of LUT-based FPGAs. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrzej_Krasniewski>
swrc:pages 616-626 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2002>
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rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2002.html#Krasniewski02a>
rdfs:seeAlso <https://doi.org/10.1007/3-540-46117-5_64>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:title Exploiting Reconfigurability for Effective Testing of Delay Faults in Sequential Subcircuits of LUT-based FPGAs. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document