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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/MiyashitaFM02>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Akira_Miyashita>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Toshihito_Fujiwara>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Tsutomu_Maruyama>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F3-540-46117-5%5F135>
foaf:homepage <https://doi.org/10.1007/3-540-46117-5_135>
dc:identifier DBLP conf/fpl/MiyashitaFM02 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F3-540-46117-5%5F135 (xsd:string)
dcterms:issued 2002 (xsd:gYear)
rdfs:label A Placement/Routing Approach for FPGA Accelerators. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Akira_Miyashita>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Toshihito_Fujiwara>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Tsutomu_Maruyama>
swrc:pages 1177-1182 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2002>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpl/MiyashitaFM02/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpl/MiyashitaFM02>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2002.html#MiyashitaFM02>
rdfs:seeAlso <https://doi.org/10.1007/3-540-46117-5_135>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:title A Placement/Routing Approach for FPGA Accelerators. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document