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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/MoorthyY08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andy_Ye>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Theepan_Moorthy>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FFPL.2008.4629912>
foaf:homepage <https://doi.org/10.1109/FPL.2008.4629912>
dc:identifier DBLP conf/fpl/MoorthyY08 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FFPL.2008.4629912 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label A scalable computing and memory architecture for variable block size motion estimation on Field-Programmable Gate Arrays. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andy_Ye>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Theepan_Moorthy>
swrc:pages 83-88 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpl/MoorthyY08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpl/MoorthyY08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2008.html#MoorthyY08>
rdfs:seeAlso <https://doi.org/10.1109/FPL.2008.4629912>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:title A scalable computing and memory architecture for variable block size motion estimation on Field-Programmable Gate Arrays. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document