[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/SchierH04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Antonin_Hermanek>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jan_Schier>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-30117-2%5F152>
foaf:homepage <https://doi.org/10.1007/978-3-540-30117-2_152>
dc:identifier DBLP conf/fpl/SchierH04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-30117-2%5F152 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Using Logarithmic Arithmetic to Implement the Recursive Least Squares (QR) Algorithm in FPGA. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Antonin_Hermanek>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jan_Schier>
swrc:pages 1149-1151 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpl/SchierH04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpl/SchierH04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2004.html#SchierH04>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-30117-2_152>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:subject Givens rotations, logarithmic arithmetic, FPGA (xsd:string)
dc:title Using Logarithmic Arithmetic to Implement the Recursive Least Squares (QR) Algorithm in FPGA. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document