A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/fpl/ShannonFPPSC06
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/fpl/ShannonFPPSC06
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Arun_Patel
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Blair_Fort
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Lesley_Shannon
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Manuel_Salda%E2%88%9A%C4%AAa
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Paul_Chow
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Samir_Parikh
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FFPL.2006.311227
>
foaf:
homepage
<
https://doi.org/10.1109/FPL.2006.311227
>
dc:
identifier
DBLP conf/fpl/ShannonFPPSC06
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FFPL.2006.311227
(xsd:string)
dcterms:
issued
2006
(xsd:gYear)
rdfs:
label
A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Arun_Patel
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Blair_Fort
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Lesley_Shannon
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Manuel_Salda%E2%88%9A%C4%AAa
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Paul_Chow
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Samir_Parikh
>
swrc:
pages
1-6
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2006
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/fpl/ShannonFPPSC06/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/fpl/ShannonFPPSC06
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/fpl/fpl2006.html#ShannonFPPSC06
>
rdfs:
seeAlso
<
https://doi.org/10.1109/FPL.2006.311227
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/fpl
>
dc:
title
A System Design Methodology for Reducing System Integration Time and Facilitating Modular Design Verification.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document