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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fpl/TavaresBMS04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/C._Bungardean>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Carlos_J._Tavares>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/G._M._Matos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_T._de_Sousa>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-30117-2%5F36>
foaf:homepage <https://doi.org/10.1007/978-3-540-30117-2_36>
dc:identifier DBLP conf/fpl/TavaresBMS04 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F978-3-540-30117-2%5F36 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/C._Bungardean>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Carlos_J._Tavares>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/G._M._Matos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_T._de_Sousa>
swrc:pages 344-353 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fpl/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fpl/TavaresBMS04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fpl/TavaresBMS04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fpl/fpl2004.html#TavaresBMS04>
rdfs:seeAlso <https://doi.org/10.1007/978-3-540-30117-2_36>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fpl>
dc:title Solving SAT with a Context-Switching Virtual Clause Pipeline and an FPGA Embedded Processor. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document