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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/fsttcs/KaneS84>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rajiv_Kane>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sartaj_Sahni>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1007%2F3-540-13883-8%5F77>
foaf:homepage <https://doi.org/10.1007/3-540-13883-8_77>
dc:identifier DBLP conf/fsttcs/KaneS84 (xsd:string)
dc:identifier DOI doi.org%2F10.1007%2F3-540-13883-8%5F77 (xsd:string)
dcterms:issued 1984 (xsd:gYear)
rdfs:label VLSI Systems For Design Rule Checks. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rajiv_Kane>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sartaj_Sahni>
swrc:pages 259-278 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/fsttcs/1984>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/fsttcs/KaneS84/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/fsttcs/KaneS84>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/fsttcs/fsttcs84.html#KaneS84>
rdfs:seeAlso <https://doi.org/10.1007/3-540-13883-8_77>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/fsttcs>
dc:subject VLSI systems; design rule checks; rectilinear polygons; systolic algorithms (xsd:string)
dc:title VLSI Systems For Design Rule Checks. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document