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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/ftcs/HengsterB99>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Bernd_Becker_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Harry_Hengster>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FFTCS.1999.781061>
foaf:homepage <https://doi.org/10.1109/FTCS.1999.781061>
dc:identifier DBLP conf/ftcs/HengsterB99 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FFTCS.1999.781061 (xsd:string)
dcterms:issued 1999 (xsd:gYear)
rdfs:label Synthesis of Circuits Derived from Decision Diagrams - Combining Small Delay and Testability. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Bernd_Becker_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Harry_Hengster>
swrc:pages 268-275 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/ftcs/1999>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/ftcs/HengsterB99/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/ftcs/HengsterB99>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/ftcs/ftcs99.html#HengsterB99>
rdfs:seeAlso <https://doi.org/10.1109/FTCS.1999.781061>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/ftcs>
dc:subject Synthesis for Testability, EXOR-based Synthesis, High Speed Circuits, Decision Diagrams (xsd:string)
dc:title Synthesis of Circuits Derived from Decision Diagrams - Combining Small Delay and Testability. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document