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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/BagannePM97>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Adel_Baganne>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Eric_Martin_0001>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jean_Luc_Philippe>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FGLSV.1997.580411>
foaf:homepage <https://doi.org/10.1109/GLSV.1997.580411>
dc:identifier DBLP conf/glvlsi/BagannePM97 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FGLSV.1997.580411 (xsd:string)
dcterms:issued 1997 (xsd:gYear)
rdfs:label Hardware interface design for real time embedded systems. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Adel_Baganne>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Eric_Martin_0001>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jean_Luc_Philippe>
swrc:pages 58-63 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/1997>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/BagannePM97/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/BagannePM97>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi1997.html#BagannePM97>
rdfs:seeAlso <https://doi.org/10.1109/GLSV.1997.580411>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:subject real-time systems; real time embedded systems; real time digital signal processing; hardware interface design; codesign approach; allocation problem; storage components; data communication; hardware-software components; I/O data modeling style; generic model; formal technique; hardware I/O transfer sequences; high level synthesis tool; GAUT; interface specification; I/O transfer order; timing constraints; cosynthesis tool; FFT algorithms; ASICs (xsd:string)
dc:title Hardware interface design for real time embedded systems. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document