Leakage Power Minimization in Deep Sub-Micron Technology by Exploiting Positive Slacks of Dependent Paths.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/ChakrabortyKASM16
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Leakage Power Minimization in Deep Sub-Micron Technology by Exploiting Positive Slacks of Dependent Paths.
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Leakage Power Minimization in Deep Sub-Micron Technology by Exploiting Positive Slacks of Dependent Paths.
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