An efficient linearity test for on-chip high speed ADC and DAC using loop-back.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/ChunYA04
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2004
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An efficient linearity test for on-chip high speed ADC and DAC using loop-back.
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ADC, BIST, DAC, linearity, mixed signal test
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An efficient linearity test for on-chip high speed ADC and DAC using loop-back.
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