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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/Delgado-FriasNMS96>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Chester_L._Miller>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Douglas_H._Summerville>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jabulani_Nyathi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_G._Delgado-Frias>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FGLSV.1996.497627>
foaf:homepage <https://doi.org/10.1109/GLSV.1996.497627>
dc:identifier DBLP conf/glvlsi/Delgado-FriasNMS96 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FGLSV.1996.497627 (xsd:string)
dcterms:issued 1996 (xsd:gYear)
rdfs:label A VLSI Interconnection Network Router Using a D-CAM with Hidden Refresh. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Chester_L._Miller>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Douglas_H._Summerville>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jabulani_Nyathi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jos%E2%88%9A%C2%A9_G._Delgado-Frias>
swrc:pages 246-251 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/1996>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/Delgado-FriasNMS96/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/Delgado-FriasNMS96>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi1996.html#Delgado-FriasNMS96>
rdfs:seeAlso <https://doi.org/10.1109/GLSV.1996.497627>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:subject Content addressable memory (CAM) Router, Interconnection networks, Hidden refresh circuitry, Parallel matching, Per-entry unique bit masking (xsd:string)
dc:title A VLSI Interconnection Network Router Using a D-CAM with Hidden Refresh. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document