40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/FullerMHB03
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40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications.
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CMOS, DRAM, FIFO, embedded memory, ultrasound
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40 MHz 0.25 um CMOS embedded 1T bit-line decoupled DRAM FIFO for mixed-signal applications.
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