A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/Kania07
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2007
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A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS.
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CPLDs, logic synthesis, technology mapping
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A new approach to logic synthesis of multi-output boolean functions on pal-based CPLDS.
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