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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/KuboMKT04>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Miyashita>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Kazuyuki_Tateishi>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yoji_Kajitani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yukiko_Kubo>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F988952.989005>
foaf:homepage <https://doi.org/10.1145/988952.989005>
dc:identifier DBLP conf/glvlsi/KuboMKT04 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F988952.989005 (xsd:string)
dcterms:issued 2004 (xsd:gYear)
rdfs:label Equidistance routing in high-speed VLSI layout design. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Hiroshi_Miyashita>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Kazuyuki_Tateishi>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yoji_Kajitani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yukiko_Kubo>
swrc:pages 220-223 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/2004>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/KuboMKT04/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/KuboMKT04>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2004.html#KuboMKT04>
rdfs:seeAlso <https://doi.org/10.1145/988952.989005>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:subject VLSI system, box routing, channel routing, dynamic programming, equidistance routing, rectilinear route, slant symmetric grid (xsd:string)
dc:title Equidistance routing in high-speed VLSI layout design. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document