An optimized linear skewing interleave scheme for on-chip multi-access memory systems.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/LiuYQ07
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/LiuYQ07
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Chunyue_Liu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xiaolang_Yan
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xing_Qin
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1145%2F1228784.1228793
>
foaf:
homepage
<
https://doi.org/10.1145/1228784.1228793
>
dc:
identifier
DBLP conf/glvlsi/LiuYQ07
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1145%2F1228784.1228793
(xsd:string)
dcterms:
issued
2007
(xsd:gYear)
rdfs:
label
An optimized linear skewing interleave scheme for on-chip multi-access memory systems.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Chunyue_Liu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xiaolang_Yan
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xing_Qin
>
swrc:
pages
8-13
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/2007
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/LiuYQ07/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/glvlsi/LiuYQ07
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2007.html#LiuYQ07
>
rdfs:
seeAlso
<
https://doi.org/10.1145/1228784.1228793
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/glvlsi
>
dc:
subject
interleave scheme, linear skewing, multi-access memory
(xsd:string)
dc:
title
An optimized linear skewing interleave scheme for on-chip multi-access memory systems.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document