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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/MangalagiriSYNXIK08>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Aditya_Yanamandra>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Karthik_Sarpatwari>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Mary_Jane_Irwin>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Osama_Awadel_Karim>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Prasanth_Mangalagiri>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Vijaykrishnan_Narayanan>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Yuan_Xie_0001>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1366110.1366204>
foaf:homepage <https://doi.org/10.1145/1366110.1366204>
dc:identifier DBLP conf/glvlsi/MangalagiriSYNXIK08 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1366110.1366204 (xsd:string)
dcterms:issued 2008 (xsd:gYear)
rdfs:label A low-power phase change memory based hybrid cache architecture. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Aditya_Yanamandra>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Karthik_Sarpatwari>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Mary_Jane_Irwin>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Osama_Awadel_Karim>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Prasanth_Mangalagiri>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Vijaykrishnan_Narayanan>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Yuan_Xie_0001>
swrc:pages 395-398 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/2008>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/MangalagiriSYNXIK08/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/MangalagiriSYNXIK08>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2008.html#MangalagiriSYNXIK08>
rdfs:seeAlso <https://doi.org/10.1145/1366110.1366204>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:subject PRAM, phase change memory (xsd:string)
dc:title A low-power phase change memory based hybrid cache architecture. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document