Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/NiuZYCYS11
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Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization.
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Obstacle-avoiding and slew-constrained buffered clock tree synthesis for skew optimization.
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