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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/PanitzOBK07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Erich_Barke>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_Koehl>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Markus_Olbrich>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Philipp_V._Panitz>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1228784.1228800>
foaf:homepage <https://doi.org/10.1145/1228784.1228800>
dc:identifier DBLP conf/glvlsi/PanitzOBK07 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1228784.1228800 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label Robust wiring networks for DfY considering timing constraints. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Erich_Barke>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/J%E2%88%9A%C4%BErgen_Koehl>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Markus_Olbrich>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Philipp_V._Panitz>
swrc:pages 43-48 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/2007>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/PanitzOBK07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/PanitzOBK07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2007.html#PanitzOBK07>
rdfs:seeAlso <https://doi.org/10.1145/1228784.1228800>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:subject design for yield, open defects, redundant wiring, timing constraint aware (xsd:string)
dc:title Robust wiring networks for DfY considering timing constraints. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document