A new look at the conditions for the synthesis of speed-independent circuits.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/PastorCR95
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1995
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A new look at the conditions for the synthesis of speed-independent circuits.
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integrated logic circuits; VLSI; logic CAD; circuit CAD; integrated circuit design; logic design; circuit optimisation; speed-independent circuits; gate-level synthesis; gate library constraint; optimization techniques; fan-in reduction
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A new look at the conditions for the synthesis of speed-independent circuits.
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