[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/PetersM95>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ines_Peters>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Paul_Molitor>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FGLSV.1995.516039>
foaf:homepage <https://doi.org/10.1109/GLSV.1995.516039>
dc:identifier DBLP conf/glvlsi/PetersM95 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FGLSV.1995.516039 (xsd:string)
dcterms:issued 1995 (xsd:gYear)
rdfs:label Priority driven channel pin assignment. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ines_Peters>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Paul_Molitor>
swrc:pages 132- (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/1995>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/PetersM95/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/PetersM95>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi1995.html#PetersM95>
rdfs:seeAlso <https://doi.org/10.1109/GLSV.1995.516039>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:subject network routing; integrated circuit layout; VLSI; circuit layout CAD; computational complexity; polynomial time improvement; linear channel pin assignment; LCPA algorithms; minimum channel density; priority schedule; vertical constraints; priority driven channel pin assignment; channel height; running time; VLSI; channel routing (xsd:string)
dc:title Priority driven channel pin assignment. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document