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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/RainaM98>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Rajesh_Raina>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Robert_F._Molyneaux>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1109%2FGLSV.1998.665230>
foaf:homepage <https://doi.org/10.1109/GLSV.1998.665230>
dc:identifier DBLP conf/glvlsi/RainaM98 (xsd:string)
dc:identifier DOI doi.org%2F10.1109%2FGLSV.1998.665230 (xsd:string)
dcterms:issued 1998 (xsd:gYear)
rdfs:label Random Self-Test Method - Applications on PowerPC (tm) Microprocessor Caches. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Rajesh_Raina>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Robert_F._Molyneaux>
swrc:pages 222-229 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/1998>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/RainaM98/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/RainaM98>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi1998.html#RainaM98>
rdfs:seeAlso <https://doi.org/10.1109/GLSV.1998.665230>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:subject High-Level Design Validation, Silicon Validation, Pseudo-Random Testing, Microprocessor Testing (xsd:string)
dc:title Random Self-Test Method - Applications on PowerPC (tm) Microprocessor Caches. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document