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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/SaglamdemirYTD07>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/%E2%88%9A%C4%96mer_Yetik>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/G%E2%88%9A%C4%BEnhan_D%E2%88%9A%C4%BEndar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Muharrem_Orkun_Saglamdemir>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Sel%E2%88%9A%C3%9Fuk_Talay>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1228784.1228884>
foaf:homepage <https://doi.org/10.1145/1228784.1228884>
dc:identifier DBLP conf/glvlsi/SaglamdemirYTD07 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1228784.1228884 (xsd:string)
dcterms:issued 2007 (xsd:gYear)
rdfs:label A coefficient optimization and architecture selection tool for SD modulators considering component non-idealities. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/%E2%88%9A%C4%96mer_Yetik>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/G%E2%88%9A%C4%BEnhan_D%E2%88%9A%C4%BEndar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Muharrem_Orkun_Saglamdemir>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Sel%E2%88%9A%C3%9Fuk_Talay>
swrc:pages 423-428 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/2007>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/SaglamdemirYTD07/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/SaglamdemirYTD07>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2007.html#SaglamdemirYTD07>
rdfs:seeAlso <https://doi.org/10.1145/1228784.1228884>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:subject design automation, mixed-signal circuits, sigma-delta converters (xsd:string)
dc:title A coefficient optimization and architecture selection tool for SD modulators considering component non-idealities. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document