[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/ZahraniBFD09>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ahmad_Al_Zahrani>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Andrew_Bailey>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Guoyuan_Fu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Jia_Di>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F1531542.1531596>
foaf:homepage <https://doi.org/10.1145/1531542.1531596>
dc:identifier DBLP conf/glvlsi/ZahraniBFD09 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F1531542.1531596 (xsd:string)
dcterms:issued 2009 (xsd:gYear)
rdfs:label Glitch-free design for multi-threshold CMOS NCL circuits. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ahmad_Al_Zahrani>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Andrew_Bailey>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Guoyuan_Fu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Jia_Di>
swrc:pages 215-220 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/2009>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/ZahraniBFD09/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/ZahraniBFD09>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2009.html#ZahraniBFD09>
rdfs:seeAlso <https://doi.org/10.1145/1531542.1531596>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:subject asynchronous circuit, glitch, mtcmos, null convention logic, threshold gate (xsd:string)
dc:title Glitch-free design for multi-threshold CMOS NCL circuits. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document