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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/ZhangMSY21>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Emre_Salman>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Ivan_Miketic>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Qiaoyan_Yu>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Zhiming_Zhang>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3453688.3461508>
foaf:homepage <https://doi.org/10.1145/3453688.3461508>
dc:identifier DBLP conf/glvlsi/ZhangMSY21 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3453688.3461508 (xsd:string)
dcterms:issued 2021 (xsd:gYear)
rdfs:label Assessing Correlation Power Analysis (CPA) Attack Resilience of Transistor-Level Logic Locking. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Emre_Salman>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Ivan_Miketic>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Qiaoyan_Yu>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Zhiming_Zhang>
swrc:pages 415-420 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/2021>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/ZhangMSY21/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/ZhangMSY21>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2021.html#ZhangMSY21>
rdfs:seeAlso <https://doi.org/10.1145/3453688.3461508>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:title Assessing Correlation Power Analysis (CPA) Attack Resilience of Transistor-Level Logic Locking. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document