[RDF data]
Home | Example Publications
PropertyValue
dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/glvlsi/ZhengMKG12>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Elias_Kougianos>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Geng_Zheng>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Oleg_Garitselov>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Saraju_P._Mohanty>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F2206781.2206866>
foaf:homepage <https://doi.org/10.1145/2206781.2206866>
dc:identifier DBLP conf/glvlsi/ZhengMKG12 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F2206781.2206866 (xsd:string)
dcterms:issued 2012 (xsd:gYear)
rdfs:label Verilog-AMS-PAM: verilog-AMS integrated with parasitic-aware metamodels for ultra-fast and layout-accurate mixed-signal design exploration. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Elias_Kougianos>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Geng_Zheng>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Oleg_Garitselov>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Saraju_P._Mohanty>
swrc:pages 351-356 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/glvlsi/2012>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/glvlsi/ZhengMKG12/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/glvlsi/ZhengMKG12>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/glvlsi/glvlsi2012.html#ZhengMKG12>
rdfs:seeAlso <https://doi.org/10.1145/2206781.2206866>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/glvlsi>
dc:title Verilog-AMS-PAM: verilog-AMS integrated with parasitic-aware metamodels for ultra-fast and layout-accurate mixed-signal design exploration. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document