Performance tuning of a multiprocessor sparse matrix equation solver.
Resource URI: https://dblp.l3s.de/d2r/resource/publications/conf/hicss/WuNJCL95
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/hicss/WuNJCL95
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/A._M._Layfield
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Keying_Wu
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/P._K._H._Ng
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Richard_M._M._Chen
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Xing_Dong_Jia
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1109%2FHICSS.1995.375414
>
foaf:
homepage
<
https://doi.org/10.1109/HICSS.1995.375414
>
dc:
identifier
DBLP conf/hicss/WuNJCL95
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1109%2FHICSS.1995.375414
(xsd:string)
dcterms:
issued
1995
(xsd:gYear)
rdfs:
label
Performance tuning of a multiprocessor sparse matrix equation solver.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/A._M._Layfield
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Keying_Wu
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/P._K._H._Ng
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Richard_M._M._Chen
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Xing_Dong_Jia
>
swrc:
pages
4-13
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/hicss/1995
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/hicss/WuNJCL95/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/hicss/WuNJCL95
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/hicss/hicss1995.html#WuNJCL95
>
rdfs:
seeAlso
<
https://doi.org/10.1109/HICSS.1995.375414
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/hicss
>
dc:
subject
circuit analysis computing; sparse matrices; parallel algorithms; SPICE; multiprocessor sparse matrix equation solver; sparse matrix equation; linear simultaneous equations; electrical circuit; SPICE; multiprocessor implementation; circuit simulation; performance tuning; parallel direct method
(xsd:string)
dc:
title
Performance tuning of a multiprocessor sparse matrix equation solver.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document