Analysis of x86 ISA Condition Codes Influence on Superscalar Execution.
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dcterms:
bibliographicCitation
<
http://dblp.uni-trier.de/rec/bibtex/conf/hipc/EscuderDR07
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Ra%E2%88%9A%C4%BCl_Dur%E2%88%9A%C2%B0n
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Rafael_Rico
>
dc:
creator
<
https://dblp.l3s.de/d2r/resource/authors/Virginia_Escuder
>
foaf:
homepage
<
http://dx.doi.org/doi.org%2F10.1007%2F978-3-540-77220-0%5F15
>
foaf:
homepage
<
https://doi.org/10.1007/978-3-540-77220-0_15
>
dc:
identifier
DBLP conf/hipc/EscuderDR07
(xsd:string)
dc:
identifier
DOI doi.org%2F10.1007%2F978-3-540-77220-0%5F15
(xsd:string)
dcterms:
issued
2007
(xsd:gYear)
rdfs:
label
Analysis of x86 ISA Condition Codes Influence on Superscalar Execution.
(xsd:string)
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Ra%E2%88%9A%C4%BCl_Dur%E2%88%9A%C2%B0n
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Rafael_Rico
>
foaf:
maker
<
https://dblp.l3s.de/d2r/resource/authors/Virginia_Escuder
>
swrc:
pages
119-132
(xsd:string)
dcterms:
partOf
<
https://dblp.l3s.de/d2r/resource/publications/conf/hipc/2007
>
owl:
sameAs
<
http://bibsonomy.org/uri/bibtexkey/conf/hipc/EscuderDR07/dblp
>
owl:
sameAs
<
http://dblp.rkbexplorer.com/id/conf/hipc/EscuderDR07
>
rdfs:
seeAlso
<
http://dblp.uni-trier.de/db/conf/hipc/hipc2007.html#EscuderDR07
>
rdfs:
seeAlso
<
https://doi.org/10.1007/978-3-540-77220-0_15
>
swrc:
series
<
https://dblp.l3s.de/d2r/resource/conferences/hipc
>
dc:
subject
Condition codes; Instruction set architecture; Instruction level parallelism; Graph theory
(xsd:string)
dc:
title
Analysis of x86 ISA Condition Codes Influence on Superscalar Execution.
(xsd:string)
dc:
type
<
http://purl.org/dc/dcmitype/Text
>
rdf:
type
swrc:InProceedings
rdf:
type
foaf:Document