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dcterms:bibliographicCitation <http://dblp.uni-trier.de/rec/bibtex/conf/hipeac/JebaliMWCZ22>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Amir_Charif>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Arief_Wicaksana>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Fatma_Jebali>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Lilia_Zaourar>
dc:creator <https://dblp.l3s.de/d2r/resource/authors/Oumaima_Matoussi>
foaf:homepage <http://dx.doi.org/doi.org%2F10.1145%2F3522784.3522796>
foaf:homepage <https://doi.org/10.1145/3522784.3522796>
dc:identifier DBLP conf/hipeac/JebaliMWCZ22 (xsd:string)
dc:identifier DOI doi.org%2F10.1145%2F3522784.3522796 (xsd:string)
dcterms:issued 2022 (xsd:gYear)
rdfs:label Decoupling processor and memory hierarchy simulators for efficient design space exploration. (xsd:string)
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Amir_Charif>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Arief_Wicaksana>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Fatma_Jebali>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Lilia_Zaourar>
foaf:maker <https://dblp.l3s.de/d2r/resource/authors/Oumaima_Matoussi>
swrc:pages 47-52 (xsd:string)
dcterms:partOf <https://dblp.l3s.de/d2r/resource/publications/conf/hipeac/2022dronese>
owl:sameAs <http://bibsonomy.org/uri/bibtexkey/conf/hipeac/JebaliMWCZ22/dblp>
owl:sameAs <http://dblp.rkbexplorer.com/id/conf/hipeac/JebaliMWCZ22>
rdfs:seeAlso <http://dblp.uni-trier.de/db/conf/hipeac/dronese2022.html#JebaliMWCZ22>
rdfs:seeAlso <https://doi.org/10.1145/3522784.3522796>
swrc:series <https://dblp.l3s.de/d2r/resource/conferences/hipeac>
dc:title Decoupling processor and memory hierarchy simulators for efficient design space exploration. (xsd:string)
dc:type <http://purl.org/dc/dcmitype/Text>
rdf:type swrc:InProceedings
rdf:type foaf:Document